Design and Implementation of DDS Signal Generator Based on FPGA


  • Shun Li



FPGA; DDS; DAC; Verilog.


With the rapid development of semiconductor technology, the digital circuit of the control chip gradually replaces the analog circuit of the traditional signal generator, which improves the performance of the signal generator and reduces the cost of research, development and production. This paper proposes a design scheme that takes FPGA chip as the control center. The signal generator system mainly includes DAC module, FPGA module and key module. The system uses Verilog language to develop the sine wave digital signal generation and key switching frequency control logic circuit on FPGA. The frequency control word circuit in the FPGA module provides multiple frequency sine wave selection, and the look-up table circuit realizes the reading of different phases by controlling the read address of the ROM. The 14-bit high-speed DAC module converts the digital signals sent by FPGA into analog signals. The DAC module integrates low-pass filter processing to increase the smoothness of the signal. After testing, the system meets the design requirements.


Download data is not yet available.


Hao D. Research on DDS-based Portable Signal Generation Testing Device[C]//Journal of Physics: Conference Series. IOP Publishing, 2021, 1971(1): 012001.

Lei H, Gao G, Huang Y. Design and Simulation of Multi-modal Signal Generator[C]//2020 7th International Conference on Information Science and Control Engineering (ICISCE). IEEE, 2020: 2366-2369.

Tierney. A Digital frequency synthesizer [J].IEEE Trans AEV, 1971, 19(1) :48-57

Vankka J. Digital frequency synthesizer/modulator for continuous-phase modulations with slow frequency hopping[J]. IEEE transactions on vehicular technology, 1997, 46(4): 933-940.

Bommi R M, Raja S S. High Performance Reversible Direct Data Synthesizer for Radio Frequency Applications[J]. Mobile Networks and Applications, 2019, 24(1): 224-233.

Dangui Y, Ruijun T, Min X, et al. An optimal method for costas loop design based on FPGA[C]//2013 Fourth International Conference on Digital Manufacturing & Automation. IEEE, 2013: 175-179.

Kuang L, Zeng J, Georgiou P. High-throughput digital readout system for real-time ion imaging using CMOS ISFET arrays[C]//2020 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2020: 1-5.

Xilinx, Inc. 7 Series FPGAs Data Sheet: Overview[J/OL]. 2020.09.

Analog Device Inc.Data Sheet: AD9763/AD9765/AD9767 10-/12-/14-Bit, 125 MSPS Dual TxDAC+ Digital-to-Analog Converters, 2009.

Zhang L, Zhang Y, Shang Z, et al. A generation and distribution system of clock signal source for signal acquisition system[J]. Engineering Reports, 2022, 4(6): e12494.

Liu Z. Design of typical waveform generator based on DDS/SOPC[C]//Proceedings 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer (MEC). IEEE, 2013: 642-645.

Muralikrishna B, Madhumati G L, Khan H, et al. Reconfigurable System-on-Chip design using FPGA[C]//2014 2nd International Conference on Devices, Circuits and Systems (ICDCS). IEEE, 2014: 1-6.

Woo M K. Frequency synthesizer requirements for future cellular radio systems (06-026)[J]. 2006.

Zhao Z, Wang L, Chen J, et al. The design and implementation of signal generator based on DDS[C]//2017 IEEE 9th International Conference on Communication Software and Networks (ICCSN). IEEE, 2017: 920-923.

Tummala R R, Laskar J. Gigabit wireless: System-on-a-package technology[J]. Proceedings of the IEEE, 2004, 92(2): 376-387.







How to Cite

Design and Implementation of DDS Signal Generator Based on FPGA. (2024). Academic Journal of Science and Technology, 9(1), 145-149.