Design and Implementation of Precision Phase Measurement Module Base on Digital Dual Mixer Time Difference
DOI:
https://doi.org/10.54097/ajst.v5i3.7903Keywords:
Distributed time synchronization systems, Phase difference measurement, DDMTD.Abstract
Precise phase difference measurement is critical for distributed time synchronization systems. Aiming at the problem of how to realize the sub-nanosecond phase difference measurement of the time signal, the digital dual mixer time difference (DDMTD) measurement technology is used to measure the fine transmission delay and the two digital clock phase difference. Given the problem that it is difficult to generate a common clock source with fine frequency changes inside the FPGA chip, the Si5338 chip is used to generate 4 differential clocks, and the communication with the FPGA is completed through the I2C protocol, and the differential signal is converted into a single-ended clock source inside the FPGA as two The common standard frequency of clock signals with the same frequency and different phases, realize the amplification of the phase difference measurement range, making the measurement accuracy reach sub-nanosecond level.
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Wang S, Cao P, Shang L, et al. A precise clock distribution network for MRPC-based experiments[J]. Journal of Instrumentation, 2016, 11(06): C06006.
Shang L, Song K, Cao P, et al. A prototype clock system for LHAASO WCDA[J]. IEEE Transactions on Nuclear Science, 2013, 60(5): 3537-3543.
Acharya A, Arora P, Gupta A S. Precise phase and frequency measurement using all digital dual mixer time difference technique[C]//2016 IEEE International Frequency Control Symposium (IFCS). IEEE, 2016: 1-2.
Zhao L, Chu S, Ma C, et al. Precise clock synchronization in the readout electronics of WCDA in LHAASO[J]. IEEE Transactions on Nuclear Science, 2015, 62(6): 3249-3255.
Moreira P, Alvarez P, Serrano J, et al. Digital dual mixer time difference for sub-nanosecond time synchronization in Ethernet[C]//2010 IEEE international frequency control symposium. IEEE, 2010: 449-453.
Girela-Lopez F, Ros E, Diaz J. Precise network time monitoring: Picosecond-level packet timestamping for fintech networks[J]. IEEE Access, 2021, 9: 40274-40285.
Tso D, Kapai S, Hu Y. High Resolution Phase Difference Detector using Digital Dual Mixer Timing Design (D-DMTD) with FPGA[R]. Sandia National Lab.(SNL-NM), Albuquerque, NM (United States), 2017.
Křen P. Improved digital dual-mixer time-difference technique and its applications[J]. Measurement, 2022, 192: 110929.
Pedretti D, Bellato M, Isocrate R, et al. Nanoseconds timing system based on IEEE 1588 FPGA implementation[J]. IEEE Transactions on Nuclear Science, 2019, 66(7): 1151-1158.
Rizzi M, Ferrari P, Flammini A, et al. Characterization of 1 Gbps fiber optics transceiver for high accuracy synchronization over Ethernet[C]//2018 IEEE International Instrumentation and Measurement Technology Conference (I2MTC). IEEE, 2018: 1-6.
Rizzi M, Lipinski M, Ferrari P, et al. White rabbit clock synchronization: Ultimate limits on close-in phase noise and short-term stability due to FPGA implementation[J]. IEEE transactions on ultrasonics, ferroelectrics, and frequency control, 2018, 65(9): 1726-1737.
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