Effects of Silicon Wafer’s Resistivity on Passivation and Devices Performances of Solar Cell

Abstract

In the manufacture of solar cells, the resistivity of silicon wafers has a crucial impact on their performance. This study investigated the effects of different resistivities on p-TOPCon solar cells. The results indicate that lower resistivity wafers have a higher implied open-circuit voltage (iV_oc) value, but higher carrier mobility due to the low resistivity leads to an increase in saturation current density (J₀). Conversely, solar cells made on higher resistivity silicon wafers have a lower carrier mobility, leading to slower electron-hole recombination and lower bulk recombination, resulting in the advantage of lower saturation current density and higher minority carrier lifetime. At the same time, simulation shows that as the resistivity increases, the V_oc and efficiency increase. However, cost considerations need to be taken into account as higher resistivity silicon wafers are more expensive. Therefore, resistivity between 2 - 3 Ω·cm² is considered the preferred substrate for solar cells as it offers a better balance between cost and achieving high cell efficiency.