Design Trade-offs in Current Mirrors: Precision and Power Efficiency

Abstract

This paper systematically investigates the critical role and optimized design of current mirrors in analog and mixed-signal integrated circuits. Current mirrors replicate and scale input currents by leveraging the matching characteristics of semiconductor devices, and are widely used for functions such as biasing, active loads, and single-ended outputs. An ideal current mirror should exhibit high output impedance, high accuracy, and a wide output range; however, practical circuits face physical limitations leading to reduced impedance, mirroring errors, and limited frequency response. Based on analysis of various current mirror architectures in recent studies, this paper provides selection recommendations for different applications: low-voltage wide-dynamic-range Gm-boosted current mirrors are preferred in low-voltage scenarios for their high accuracy and impedance; for high-performance and high-swing requirements, regulated cascode current mirrors with improved voltage swing can be adopted, trading off area and power consumption for enhanced speed, output swing, and stability; tapered stacked-gate current mirrors effectively improve area, noise, and mismatch through layout optimization. Studies indicate that current mirror design requires balancing multiple constraints including precision, impedance, power consumption, and speed. Future research should integrate advancements in semiconductor technology and practical application requirements to further explore advanced architectures with higher accuracy and lower power consumption.