CMOS-Based AI Chip Design and Development Trends

Authors

  • Letao Gong

DOI:

https://doi.org/10.54097/c2rpzy38

Keywords:

CMOS, AI chips, CMOS architecture, Cloud-edge collaboration, Advanced packaging.

Abstract

With the rapid growth and development of end devices, CMOS-based chips have encountered a bottleneck in development. Traditional CMOS manufacturing methods are reaching the physical limits based on Moore’s law. In particular, the demands of technologies such as Artificial Intelligence, 5G and autonomous driving have driven the continuous advancements of chip design in recent years. By using traditional methods, when CMOS size continues to shrink, power consumption and heat dissipation issues have become increasingly prominent, limiting further improvement and future development of chip performance. There is increasing demand for higher performance, including inference capabilities and deep learning, conflicts with lower consumption and maintaining low costs. Therefore, finding a balance between power consumption, heat dissipation, and performance has become a direction for research and development of chip design. Success will depend on cross collaboration between different levels in the industry that includes both innovation and manufacturing, how to break through the bottleneck becomes a challenge in developments. CMOS-based AI chips will be an indispensable part in the future of high-tech industries, thus supporting the long-term developments in various industries.

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Published

30-03-2026

Issue

Section

Articles

How to Cite

Gong, L. (2026). CMOS-Based AI Chip Design and Development Trends. Academic Journal of Science and Technology, 20(2), 180-187. https://doi.org/10.54097/c2rpzy38