The Design of Fixed Priority and Round Robin Arbitrator

Abstract

System performance, especially in multiprocessor systems, largely depends on the efficiency of the bus architecture. In a system-on-a-Chip (SoC), the arbiter is a key technology in the shared bus structure, used to solve the conflict problem when multiple controller devices simultaneously request bus resources. The fixed priority arbiter has the advantages of low resource consumption and is suitable for scenarios with strict real-time requirements. The round robin arbitrator has the characteristic of high arbitration fairness. This paper designs two different designs of arbitrators, including two fixed priority arbitrators implemented through different algorithms and one round robin arbitrator. Fixed priority arbitrators can ensure that critical tasks receive responses within the same clock cycle when signals arrive, which is crucial for scenarios such as interrupt handling and high-speed data transmission. Efficient arbitration algorithms, such as a round robin arbitrator, can balance the access opportunities of various devices, avoid low-priority devices waiting for a long time, and thus improve the overall throughput of the system. In this study, the fixed priority arbitrator optimizes the algorithm to achieve the output of the arbitration result when the clock signal arrives. The round robin arbitrator implements a fairer arbitration mode based on the fixed priority arbitrator. Ensure that every signal has the opportunity to be arbitrated.