Resistive Random-Access Memory (ReRAM) Circuit Design Optimization

Rui Liu

doi:10.54097/3w6yh137

Authors

Rui Liu

DOI:

https://doi.org/10.54097/3w6yh137

Keywords:

RRAM, Low power, In-memory and near-memory computing.

Abstract

With the fast development and broad application of artificial intelligence, mobile terminals, and autonomous driving, the advanced System-on-Chip (SoC) design faces unprecedented memory demand, especially under the two core requirements for High-Density Integration and Low-Power Operation. Under such circumstances, Resistive Random-Access Memory (RRAM) emerges as a promising candidate to replace traditional memories, owing to its high storage density and low energy consumption, excellent non-volatile characteristics, and good compatibility with the standard CMOS manufacturing process. This paper systematically sorts out and reviews a series of significant progress and research threads in recent years in RRAM technology, covering multiple levels, from process optimization at the device level and design for pure storage applications to near-memory computing architectures and more innovative in-memory computing architectures. From this overall technical perspective, this paper carries out an in-depth analysis and discussion on the huge application potential of RRAM in building the next-generation, high-energy-efficiency SoC system, the key technological paths to be broken through, and the broad application prospects and development directions that may be realized in the future, providing a systematic reference for subsequent research in this field.

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References

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