Encrypt ECG signals based on the optimized 4-bit absolute value comparator

Authors

  • Lixuan Xu

DOI:

https://doi.org/10.54097/hset.v71i.13437

Keywords:

ECG; logic effort; CMOS, energy consumption; delay.

Abstract

As people become more conscious of private information security and advancements in Electrocardiogram (ECG) identity identification technology, the need to encrypt private data intensifies. New wearable medical devices continuously gather vast amounts of personal health data, underscoring the urgency of safeguarding privacy. This paper focuses on encrypting and decrypting rich characteristic signals like ECG. It delves into the core aspects, including the logic circuit diagram of a four-bit digit absolute comparator using Complementary Metal Oxide Semiconductor (CMOS) technology and optimizing delay through logic effort to reduce power consumption. XOR gates and other gate circuits, as well as complement subtraction principles, are employed in building logic gates. Calculating delay involves selecting the longest critical path and determining the specific parameters (g, h, and p) for each logic gate. Subsequently, energy consumption is computed using a formula, revealing a trade-off between energy and delay. After optimization, the circuit's energy consumption is 184.832, and the delay is 34.13. In summary, the 4-bit absolute value detector plays a crucial role in encryption, addressing the growing concern for privacy and data security.

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References

Arin G, Jianwei Z, Hesham E, et al. Increased Risks of Re-identification For Patients Posed by Deep Learning-Based ECG Identification Algorithms. Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Annual International Conference, 2021.

Zeng Jixin. Development of identity recognition system based on finger ECG signal. Hangzhou Dianzi University, 2015.

Chiu C C, Chuang C M, Hsu C Y. A novel personal identity verification approach using a discrete wavelet transform of the ECG signal. 2008 International Conference on Multimedia and Ubiquitous Engineering (mue 2008). IEEE, 2008: 201-206.

Aranda A, Karel J, Bonizzi P, et al. Acute MI Detection Derived From ECG Parameters Distribution. IEEE, 2019.

Li Zhiqiang, Ren Xiaohong, Lin Yongwu. Research on key techniques of image-based ECG waveform detection. Chinese Journal of Metrology, 2023, (02):110-113+121.

Li C, Zheng C, Tai C. Detection of ECG characteristic points using wavelet transforms. IEEE Transactions on biomedical Engineering, 1995, 42(1): 21-28.

Pan J, Tompkins W J. A real-time QRS detection algorithm. IEEE transactions on biomedical engineering, 1985 (3): 230-236.

Verma K G, Singh R, Kaushik B K, et al. Monte Carlo analysis of propagation delay due to process induced line parasitic variations in VLSI interconnects. 2011 International Conference on Emerging Trends in Networks and Computer Communications (ETNCC). IEEE, 2011: 6-10.

Celinski P, Al-Sarawi S, Abbott D, et al. Logical effort based design exploration of 64-bit adders using a mixed dynamic-cmos/threshold-logic approach. IEEE Computer Society Annual Symposium on VLSI. IEEE, 2004: 127-132.

Saravanakumar S, Srinivasan K, Rukkumani V, et al. Delay Minimization and Evaluation in Logic Paths of RC Interconnects by Unified Logical Effort. 2021 International Conference on Advancements in Electrical, Electronics, Communication, Computing and Automation (ICAECA). IEEE, 2021: 1-6.

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Published

28-11-2023