Research on Fault Injection based on Lockstep Architecture Processors

Jie Lei

doi:10.54097/8qzcpf21

Authors

Jie Lei

DOI:

https://doi.org/10.54097/8qzcpf21

Keywords:

Software Fault Injection, Lockstep Architecture Processor, System-Level Verification

Abstract

This paper focuses on a lockstep architecture processor and employs a software-based fault injection method to construct a system-level verification model. By implementing data consistency fault injection and high-concurrency stress testing, the processor's loss-of-lock detection mechanism and operational stability were comprehensively evaluated. The test results successfully verified that the lockstep comparator can accurately identify and report data discrepancies, and does not generate false alarms under extreme loads. This proves that both its data error tolerance and system anti-interference capabilities meet design expectations, providing a key verification basis for the chip's functional safety.

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