Ripple-Carry Vs Carry-Lookahead: A Study of Delay–Area–Power Trade-Offs

Abstract

Since adders are located on the critical paths of arithmetic units, the choice between Ripple-Carry Adders (RCA) and Carry-Lookahead Adders (CLA) has first-order impacts on clock frequency, silicon area, and energy. This paper takes a look back at RCA/CLA and all its variants to see what has happened recently (2021–2025). The research summarizes results from publicly available, peer-reviewed research on EDP, area, power, and improved CLA structures (e.g., hierarchical and non-uniform grouping), hybrid organizations (e.g., carry-select adders using 4-bit RC/CLA generators), approximate and asynchronous CLAs for event-driven or error-tolerant workloads, and final considerations (e.g., fan-in limits and routing congestion) as they pertain to implementation. Through all investigations, CLAs have been shown to reduce critical paths and enable more stringent timing. For smaller word sizes or less stringent clock requirements, RCAs typically outperform in terms of area and dynamic power. Word size, activity factors, cell-library constraints, and flow settings determine the apparent break-even threshold. The paper’s last remarks include some helpful hints for selection as well as some outstanding questions, with an emphasis on the potential for non-uniform grouping and comparisons with parallel-prefix adders.