Bit-Width Conversion Based on Asynchronous FIFO

Abstract

As digital integrated circuits become larger and larger, data transfer between different clocks and different bit widths becomes inevitable. For different clocks, asynchronous First In First Out (FIFO) can be used to solve very well. In this paper, we introduce the basic theory of asynchronous FIFO, and then implement the transfer between different bit widths based on asynchronous FIFO. By analyzing the bit-width conversion in two cases, input bit-width < output bit-width and input bit-width > output bit-width, we finally get a unified conversion idea: input data is assembled and input into asynchronous FIFO, and asynchronous FIF3O output data is split and output, and a bit-width conversion method is given by borrowing the storage function of asynchronous FIFO. Finally, the simulation is verified with the help of Verilog. By this method, an asynchronous FIFO can be implemented for conversion between various bit widths without considering the difference between input bit widths larger or smaller than output bit widths, and the conversion can be done in one step, thus improving the conversion efficiency.