Ldo Chip Advanced Technology Development Exploration
DOI:
https://doi.org/10.54097/rvs6h539Keywords:
LDO; power supply rejection ratio; quiescent current; transient response.Abstract
In the wake of the exponential advancement of information technology, electronic devices are widely used in consumer, automotive, medical, and other fields, which has an escalating demand for power management chips. Low Dropout Regulator (LDO) occupies a significant position in power management chips because of its advantages of low cost, low power consumption, and simple structure, which is the basis for electronic devices to output stable voltage without ripple and low noise. The article first introduces the research background and significance of the LDO chip. Secondly, it analyzes the basic structure of LDO consisting of five modules: reference circuit, power device, resistive feedback network, error amplifier, and auxiliary circuit. The function of each module is expounded upon, and the basic operational principle of the LDO is elucidated. Finally, the research status and development trend of LDOs in the three directions of robust power attenuation, minimal idle current, and swift transient reaction. A brief explanation of the factors influencing each parameter and their respective optimization methods is also provided.
Downloads
References
Bai Chunyang. Design of a high precision and low noise LDO circuit. Harbin Institute of Technology, 2021.
Chen Jinwei. Design of Low Noise and Fast Response LDO. University of Electronic Science and Technology of China, 2022.
Jin Yan. Regulator Design of a Low-Power High-Stability LDO Linear. Soochow University, 2016.
Cao Feifei. Design and Research of a Low-Dropout Regulator with Low noise, Fast transient response and High stability. University of Electronic Science and Technology of China, 2022.
Wang Chen. Research and Design of Low-Dropout Regulator with Low Noise and High Power-Supply Rejection Ratio. University of Electronic Science and Technology of China, 2021.
C. -H. Huang, W. -C. Liao. A High-Performance LDO Regulator Enabling Low-Power SoC with Voltage Scaling Approaches. IEEE Transactions on Very Large-Scale Integration (VLSI) Systems, 2020, 28(5): 1141–1149.
Zeng Yanhan, Ge Qianhui, Zhang Xin, Zhang Yuting, Chen Meiling, Li Yongfu. A CAFVF-based output-capacitor-less LDO with PSRR improvement by feed forward and negative capacitance. Integration, 2023, 93.
Hao Mengliang. Design of LDO with ultra-low quiescent current. Nanjing University of Posts and Telecommunications, 2021.
MII K, NAGAHAMA A, WATANABE H. Ultra-Low Quiescent Current LDO with FVF-Based Load Transient Enhanced Circuit. IEICE Transactions on Electronics, 2020, 10: 466–471.
GUO T, KANG W, ROH J. A 0.9-μA Quiescent Current High PSRR Low Dropout Regulator Using a Capacitive Feed-Forward Ripple Cancellation Technique. IEEE Journal of Solid-State Circuits, 2022, 57(10): 3139–3149.
Y. Peng, S. Huang, Q. Duan. A Fast Transient Response LDO without on-chip Compensated Capacitor. 2021 4th International Conference on Electron Device and Mechanical Engineering, Guangzhou, China, 2021.
Grajdeanu, Alina-Teodora Raducan, Cristian Plesa, Cosmin-Sorin Neag, Marius Varzaru, Laurentiu Topa, Marina Dana. Fast LDO Handles a Wide Range of Load Currents and Load Capacitors, up to 100 mA and Over 1μF. IEEE Access, 2022, 10: 9124–9141.
Downloads
Published
Issue
Section
License
Copyright (c) 2024 Highlights in Science, Engineering and Technology
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.
How to Cite
